I was wondering wether it is possible or not to reverse engineer
an FPGA design starting from the configuration bitstream.
I know that it is easy to copy a design by cloning the bitstream in the external flash memory but this would lead to an identical copy of the original.
Are there any tools or maps that may help someone to alter an FPGA
design?
Everything is possible. But this particular task is very difficult, because bit-stream format is closed. Long-long time ago there was a tool set from Xilinx (JBits) which provided classes for direct handling of bit-streams, but it was discontinued some years ago. Anyway, you can check this link: http://www.geocities.com/SiliconValley/Pines/6639/fpga/jbits.html