allanvv
Advanced Member level 4
What am I doing wrong in my simulation? The voltage levels are too high.
https://i.imgur.com/kCRSE.png
I'm trying to simulate the DDR2 termination schemes according to Altera's external memory handbook.
https://i.imgur.com/kCRSE.png
I'm trying to simulate the DDR2 termination schemes according to Altera's external memory handbook.