DC_SHELL constraint about input delay and output delay

[bigdog]

input delay and output delay

Hi Guys,

I am confused with the command "set_input_delay" and "set_output_delay":
The clock frequency is 50MHz.
For constraint on a path from input pin to a DFF, I want the logic between input pin and the DFF to take only 5 ns,
should I use "set_input_delay -max 15" or "set_input_delay 5"?
And for output path, I still want the logic between DFF and output pin to take only 5 ns,
so which instruction is right: "set_output_delay -max 15" or "set_output_delay 5"?

Best regards

 

[arjun1110]

input delay constrain

Hi,

You can use "set_input_delay -max 15" and "set_output_delay -max 15" for your requirement.

Best regards,

 

[bigdog]

input delay

Ok, thank you so much!

Best regards,