DC offset by Common mode feedback circuit

[electronics_rama]

Hello all,

When I design a common mode feedback circuit for the differential amplifier, it is adding a DC offset to my output common mode voltage. Can anybody please suggest me how to go ahead with this issue?

I'm thinking that if I use DC offset correction circuit, I can resolve this issue. Am I correct here or is there any other method to resolve this issue?

-Rama

 

[AMS012]

If you are seeing a differential offset, it should not be because of CMFB, then as you said, by using a DC offset correction circuitry you can get rid of the DC offset (This is what is normally done in the Direct conversion receivers to remove DC propagation).
But if you are seeing a deviation in the output common mode voltage from what you expect it to be, then the gain of the CMFB loop is not enough. By increasing the loop gain of CMFB, you can get closer to the desired common mode output voltage. But increasing the loop gain might affect the stability of the CMFB loop.

 

[electronics_rama]

Yes. I agree with that. Is there any other way to avoid this issue without going for higher gain CMFB circuit?

 

[AMS012]

You can do a replica bias design. But that suffers a lot a mismatch issues. If you can take care of that by mismatch simulation and by making the devices large enough, it can be done. The other issue I see is that its reaction time to any common mode glitches is more than that of a CMFB loop.

 

[dick_freebird]

Well, you always need gain error to be minimized to
"good enough" at least. If you need to pull 1V with a
10mV offset that says A=100 (40dB) at least.

Is the error more than the natural offset of the CMFB
amp, in isolation? Is the amp perhaps required to work
at an output or input bias level that isn't its "happy
place" and thus costs you gain, from what it ideally
could give you (i.e. if the CMFB control point is near
the rails, is it falling away from peak AVOL?)? If so then
maybe look at level shifting / centering?