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Start-Up Circuit For Sub 1-V circuit

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KGF KING

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Hi I'm trying to design a start-up circuit for a resistive divider current mode bandgap with 2stage pmos opamp about but i'm facing high issue when the supply goes higher. My Vref was 0.5V and my Iref also 0.5uA. At higher voltage or at certain temperature when the start-up circuit either didn't work or causing ringing. My mvt device Vth variation is 0.59V to 0.03 across the PVT for PMOS and for NMOS 0.51 to 0.1V for PVT. At tt corner 0.39 (-40C) to 0.07 (125C) for PMOS and 0.39 (-40C) to 0.19 (125C) for nmos. Can anyone have step to refer on how to design start-up circuit for sub-1V bandgap with these Vth variation. I also have option to standard Vth device but i couldn't find idea on how to incorporate those device into it.

1740069811282.png
 
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You need at least two things. A low current source that is "always on" regardless of the bigger picture, that works to energize the "op amp" guts, and a detector of right-ness that takes that current away.

This latter, in a sub-bandgap design, will differ from old school art.
 
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1740104456684.png

Thanks for the input guys...based your advise i have design the startup circuit but for this i need to give a 2pF miller compensation at the opamp. Do you think this one can work or how to improvise it?
 
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dick_freebird said:
You need at least two things. A low current source that is "always on" regardless of the bigger picture, that works to energize the "op amp" guts, and a detector of right-ness that takes that current away.

This latter, in a sub-bandgap design, will differ from old school art.
Click to expand...
Hi sir, can you explain more about this trying to picture idea..thank you
 
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I don't see a startup circuit there in the funky
schematic. What reason does the "op amp"
have, to pull that PMOS rack to life reliably?
Its bias is set by the thing it drives. Chicken,
OK. Egg, OK. Nobody thinks much about the
rooster.
 
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