Cross coupled CMOS LC-VCO swing varies over frequency range

[subbareddy434]

i have designed cross coupled cmos lc_vco with free running frequency of 2.7G
and my bias current is 1mA.here i used to accumulation mode varactors to get tuning.after i performed pss analysis on vco it showing vco swing is varies over frequency range.
please help me in this regard.
Here i have attached my schematic and voltage swing plot over frequency range.

 

[saro_k_82]

This is not unexpected isnt it. You reduce the capacitance to increase the frequency keeping inductor and tail current constant, you should see increase in voltage swings. In most cases the amplitude variation of VCO output over frequency is not a problem. Do you really have a problem with the swing variation?

 

[subbareddy434]

my level shifter stage requires constant swing. actually i used current mode logic (cml) to design the divider(1/8) .So cml logic requires minimum swing of 0.4v.