Hi everyone
After the compilation, given that we are at the top level, using the report_timing we obtain a certain path with a certain time X. After changing the current design(going more inside) and using the report_timing command again, we obtain a path with a time that is HIGHER than X. Why? Shouldn't the report_timing command display the same path when we are in the top level design?
Hi everyone
After the compilation, given that we are at the top level, using the report_timing we obtain a certain path with a certain time X. After changing the current design(going more inside) and using the report_timing command again, we obtain a path with a time that is HIGHER than X. Why? Shouldn't the report_timing command display the same path when we are in the top level design?
At the top level the worst path will be any path in the top level. At "current_instance <hier>", the worst path will be only the worst path within that particular <hier>. Check that you have the exact same timing path reported in both cases.