Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Critical Path in a design

Status
Not open for further replies.

onta00

Newbie level 4
Joined
Oct 11, 2018
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
33
Hi everyone
After the compilation, given that we are at the top level, using the report_timing we obtain a certain path with a certain time X. After changing the current design(going more inside) and using the report_timing command again, we obtain a path with a time that is HIGHER than X. Why? Shouldn't the report_timing command display the same path when we are in the top level design?
 

ThisIsNotSam

Advanced Member level 5
Joined
Apr 6, 2016
Messages
2,151
Helped
381
Reputation
762
Reaction score
389
Trophy points
83
Activity points
10,945
Hi everyone
After the compilation, given that we are at the top level, using the report_timing we obtain a certain path with a certain time X. After changing the current design(going more inside) and using the report_timing command again, we obtain a path with a time that is HIGHER than X. Why? Shouldn't the report_timing command display the same path when we are in the top level design?

are you sure you are not confusing the path timing with the slack? slack is supposed to be higher.
 

onta00

Newbie level 4
Joined
Oct 11, 2018
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
33
are you sure you are not confusing the path timing with the slack? slack is supposed to be higher.

The command report_timing reports timing paths. I've used the same command in the top level entity and in the inner entity
 

ThisIsNotSam

Advanced Member level 5
Joined
Apr 6, 2016
Messages
2,151
Helped
381
Reputation
762
Reaction score
389
Trophy points
83
Activity points
10,945
The command report_timing reports timing paths. I've used the same command in the top level entity and in the inner entity

It reports slacks. Make sure you are not reading it wrong. Care to post the paths here?
 
  • Like
Reactions: onta00

    onta00

    Points: 2
    Helpful Answer Positive Rating

arvinraj

Newbie level 4
Joined
Oct 15, 2018
Messages
6
Helped
3
Reputation
6
Reaction score
4
Trophy points
3
Activity points
75
At the top level the worst path will be any path in the top level. At "current_instance <hier>", the worst path will be only the worst path within that particular <hier>. Check that you have the exact same timing path reported in both cases.
 
  • Like
Reactions: onta00

    onta00

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top