plasma2000
Junior Member level 1

Hello, my friends.
I am actuelly drawing a layout containing some resistors and transistors beside which some dummys should be added.
Is it possible to draw the dummy myself? If yes, How many levels should I draw for MOS, Resistor, npn?
I have done a current souce. In the picture, some PMOS share the Drain and Source which are not connected to VDD.
I have heard that for a PMOS dummy, all terminals should be connected to VDD. And here in this case, shall I let it share the Drain or Source with his neighbor???
Finally, here I draw the 4 PMOS in "1221", Is it prefered to use commun centroide structure???
Thanks for your Help! Merci bcp!
I am actuelly drawing a layout containing some resistors and transistors beside which some dummys should be added.
Is it possible to draw the dummy myself? If yes, How many levels should I draw for MOS, Resistor, npn?
I have done a current souce. In the picture, some PMOS share the Drain and Source which are not connected to VDD.
I have heard that for a PMOS dummy, all terminals should be connected to VDD. And here in this case, shall I let it share the Drain or Source with his neighbor???
Finally, here I draw the 4 PMOS in "1221", Is it prefered to use commun centroide structure???
Thanks for your Help! Merci bcp!