[SOLVED] coverage related query .. need urgent help

[arpkum]

Hi all ,
I Have two questions , both are related to coveage . Please help me .:-

1. If code coverage is 70% and functional coverage is 100% then
a) what conclusion we can drive from this statement ?
b) what do we infer from our design ?
c) How to correct this one ?

2. Suppose we are going for FSM coverage for 2 bits . lets say
00 - adder
01 - subtractor
10 - nill
11 - mulitplier.

what conclusion should we drive from this ?
How it will synthesize for our design . ?

NOTE: I know that it is a bug (10 - nill).

Thanks
arpit

 

[ajitrefs]

hi arpit,
you have to thrive for 100% code coverage provided you have appropriate reason to prove that it is not necessary. It's like.

if () begin <addition_logic>end
else begin <redundant_logic>end

you have written test to cover if part but your else part still remain, then you shloud be able to explain why you havent covered else part. If you got valid reason then its good to move.

 

[arpkum]

HI Ajitrefs,
Basically you have cleared my doubt abt my 1st question , isnt it ?
can you briefly explain which one is more important code or functional , well according to me both are having their own importance . isnt it ?

And could u help e out abt 2nd question a little
Thanks
Arpit

 

[dave_59]

If you have less then 100% code coverage and 100% functional coverage, you could also conclude that your have not satisfactorily entered your functional coverage, leaving undiscovered bugs in your code. There is no clear metric to measure that. We have a guide to help with that. https://verificationacademy.com/cookbook/Coverage

I do not understand your FSM coverage question. How is 10 a bug? Is it an invalid state, or a don't care. Synthesis tools will do exectlay what you tell it to do.

 

[arpkum]

HI dave_59,
sry for late response , was stuck in some other work.
Now , about my 2nd question 10 is an invalid state or a dont care condition.
How this will affect the synthesis part?
Kindly help me in that

Thanks
Arpit

 

[dave_59]

I was asking abou t how you wrote your code for the FSM and realized '10' as a nil state. As a don't care, synthesis tools will optimize your logic, but you will need to verify if your FSM ever gets into that state, it can get out of it. If it is an illegal state and you have a line of code that represents that, you will have to exclude that from coverage.

 

[arpkum]

HI dave,
Your last statement only concluded my query.:smile:
thanks for your kind help
arpit