Hi,
I am working on TSMC 40nm.
I need to use BUMP cells and I would like to get the right bump pitch to use.
Inside the BUMP's documentation I read the following differences that determine the "Bump pitch":
BUMP pitch: you have to contact the foundry. Multiple pitches are possible, multiple bump sizes are possible. If you are in an MPW, this was probably already picked for you and cannot be changed.
The difference is that silicon is sometimes shrunk when compared to design units. You draw 100nm, but with a 95% shrink, it will become 95nm on the real chip. This is really common when technologies become mature.