[SOLVED] Corner analysis MM-RFCMOS

[Canosa]

Hi everyone!

Im doing Corner analysis for RF CMOS circuit and i have some doubts about the corner cases too choose.
Until now im doing the corner analysis in this way:
My circuit have only RF Nmos transistor, RF capacitors and Inductors
Corners for RF nmos transistor and caps and inductors ("typ"):
case 1
Nmos- worst: (N=slow, Vdd=Vnom+10%, T=125),
case 2
Nmos- best: (N=fast, Vdd=Vnom-10%, T=-40)
case 3
Nmos-typical: (N=Typ, Vdd=Vnom, T=50)
And for each case before inductor and RF caps are typical
/*---------------------------------------------------------------------*/
Corners for RFnmos transistors and RF caps and Inductor together ("max" "min")
case 4,5
Nmos-worst: (N=slow, Vdd=Vnom+10%, T=125)
Inductors - ("max", "min")
RF caps - ("max", "min")
case 6,7
Nmos-best: (N=fast, Vdd=Vnom-10%, T=-40)
Inductors - ("max", "min")
RF caps - ("max", "min")
case 8,9
Nmos-typical: (N=typ, Vdd=Vnom, T=50) instead of T=27
Inductors - ("max", "min")
RF caps - ("max", "min")
/*-----------------------------------------------------*/
Questions:
1) Why for the worst case the Vdd goes up to 10% and temperature is set to 125º and for the best case Vdd goes down 10% and temperature is set to -40º? I dont understand the relationship between the supply voltages and temperature for the two cases.

2) Since the circuit is tunned to work for an especific frequency, for me it makes sense to vary inductors and capacitors to the "same side corner", and not simulate corners which would have capacitor "max" and inductors "min" (opposite side) on the same corner case. Since major tunned circuit work for w=1/SQRT(LC).
So varying caps and inductor to "the same side" would influence more the drift of working frequency. Is this correct?

3) I readed before about junction temperature, and some people say that can vary between 40-70. And it is process and circuit dependent (Power dissipated on the circuit and density). Normally the simulator is set to ambient temperature by default, 27º. It makes sense to start designing the circuit for 50º, since the junction temperature it will be always between 40-70?
So its right to simulate the thypical corner for T=50º? How normally you do?

4) Last one, It makes sense the corners cases listed before? Is that what you normally do?

If i made any incorrect statements please be free to correct me...

Best regards

Canosa

 

[erikl]

Questions:
1) Why for the worst case the Vdd goes up to 10% and temperature is set to 125º and for the best case Vdd goes down 10% and temperature is set to -40º? I dont understand the relationship between the supply voltages and temperature for the two cases.

Worst case actually means slowest case, which implies slowest process, i.e. slowest transistors (just Nmos, in your case), max. inductance, max. capacitance, lowest supply voltage (because circuits usually work slower at lower voltage, which mostly also means lower current), and max. temperature (because charge carrier mobility gets lower with higher temperature).

For the best case, which means fastest case, the vice versa conditions apply.

2) Since the circuit is tuned to work for a specific frequency, for me it makes sense to vary inductors and capacitors to the "same side corner", and not simulate corners which would have capacitor "max" and inductors "min" (opposite side) on the same corner case. Since major tunned circuit work for w=1/SQRT(LC).
So varying caps and inductor to "the same side" would influence more the drift of working frequency. Is this correct?

Yes, totally agree!

3) I read before about junction temperature, and some people say that can vary between 40-70. And it is process and circuit dependent (Power dissipated on the circuit and density). Normally the simulator is set to ambient temperature by default, 27º. It makes sense to start designing the circuit for 50º, since the junction temperature it will be always between 40-70?
So it's right to simulate the typical corner for T=50º? How normally you do?

This depends on the usual ("typical") ambient (air) temperature, the self-heating of the chip (from its own power consumption), and its cooling facility. In hot countries and/or significant power consumption of the electronic system, a typical temperature of 50°C could well be justified.

4) Last one, It makes sense the corners cases listed before? Is that what you normally do?

No. I'd use
case 1
Nmos- worst: (N=slow, Vdd=Vnom-10%, T=125, Inductors - ("max"), RF caps - ("max"))
case 2
Nmos- best: (N=fast, Vdd=Vnom+10%, T=-40, Inductors - ("min"), RF caps - ("min"))
case 3
Nmos-typical: (N=typ, Vdd=Vnom, T=25, Inductors - ("typ"), RF caps - ("typ"))

If you actually consider a temperature rise of - say - 25K, i.e. a rise from the normal 25°C to 50°C in a typical application condition (due to high ambient temperature and/or self heating of the chip), you should also consider this temperature rise for the best and the worst case, i.e. T=-15 instead of -40 for the best case, and T=150 instead of 125 for the worst case.

 

[Canosa]

Thank you very much erikl... now im able to understand better corner cases... But i still have one question about it...

No. I'd use
case 1
Nmos- worst: (N=slow, Vdd=Vnom-10%, T=125, Inductors - ("max"), RF caps - ("max"))
case 2
Nmos- best: (N=fast, Vdd=Vnom+10%, T=-40, Inductors - ("min"), RF caps - ("min"))
case 3
Nmos-typical: (N=typ, Vdd=Vnom, T=25, Inductors - ("typ"), RF caps - ("typ"))

So the "max"and "min" corners for inductor and capacitor means max and min deviation from typical case? right?
But what causes that max and min deviation, for inductors and capacitors? Etching accuracy..?

 

[erikl]

So the "max"and "min" corners for inductor and capacitor means max and min deviation from typical case? right?

Yes.

But what causes that max and min deviation, for inductors and capacitors? Etching accuracy..?

Yes, concerning widths. Plus (also) process-related sheet thickness tolerances of both metal and dielectric layers.

 

[Canosa]

Thanks again Erikl... Last question...
If you have to choose specifc corners cases just for T=25º. What cases you would choose? i mean the worst, best and norminal case just for T=25º.
Something like this?
case 1
Nmos- worst: (N=slow, Vdd=Vnom-10%, T=25, Inductors - ("max"), RF caps - ("max"))
case 2
Nmos- best: (N=fast, Vdd=Vnom+10%, T=25, Inductors - ("min"), RF caps - ("min"))
case 3
Nmos-typical: (N=typ, Vdd=Vnom, T=25, Inductors - ("typ"), RF caps - ("typ"))

Canosa

 

[erikl]

Yes. This would mean the "process + supply tolerances only at nominal temperature" conditions.

I wouldn't call these conditions "worst" or "best" - because these designations traditionally are reserved for the additional inclusion of the coldest resp. the hottest operating temperatures, but "slowest" resp. "fastest" (process+supply).

 

[Canosa]

Thank you very much Erikl