Dec 12, 2014 #1 V VirtuosoDracula Junior Member level 1 Joined Oct 2, 2011 Messages 17 Helped 1 Reputation 2 Reaction score 1 Trophy points 1,283 Activity points 1,388 Hi, Can anybody please explain if the setup time could be negative. If yes, under what conditions? As per my understanding if setup time is negative, then the data is coming after the active clock edge, thus leading to capture of old data. Please help to explain this concept. Thanks in advance VD!
Hi, Can anybody please explain if the setup time could be negative. If yes, under what conditions? As per my understanding if setup time is negative, then the data is coming after the active clock edge, thus leading to capture of old data. Please help to explain this concept. Thanks in advance VD!
Dec 12, 2014 #2 verylsi Full Member level 2 Joined Mar 12, 2012 Messages 123 Helped 16 Reputation 32 Reaction score 16 Trophy points 1,308 Activity points 2,130 hi, The set up time equation is - Tc2q + Tcomb + Tsetup ≤ Tclk + Tskew Tsetup ≤ (Tclk + Tskew) - ( Tc2q + Tcomb ) Under the condition when Tc2q + Tcomb > than Tclk + Tskew then Tsetup will be negative. So mainly your aim is to design such that that the combination logic is minimal, specially when you are using a high frequency clock. HTML: http://www.edn.com/design/analog/4371393/Understanding-the-basics-of-setup-and-hold-time This link covers in depth analysis of set up and hold time Last edited: Dec 12, 2014
hi, The set up time equation is - Tc2q + Tcomb + Tsetup ≤ Tclk + Tskew Tsetup ≤ (Tclk + Tskew) - ( Tc2q + Tcomb ) Under the condition when Tc2q + Tcomb > than Tclk + Tskew then Tsetup will be negative. So mainly your aim is to design such that that the combination logic is minimal, specially when you are using a high frequency clock. HTML: http://www.edn.com/design/analog/4371393/Understanding-the-basics-of-setup-and-hold-time This link covers in depth analysis of set up and hold time
Dec 15, 2014 #3 S std_match Advanced Member level 4 Joined Jul 9, 2010 Messages 1,304 Helped 463 Reputation 926 Reaction score 448 Trophy points 1,363 Location Sweden Activity points 10,170 There is nothing strange with a negative setup time. Imagine a delay in the clock line. If the data and clock switches at the same time. the data will arrive first to the register. If you delay the clock enough, the setup time will be negative.
There is nothing strange with a negative setup time. Imagine a delay in the clock line. If the data and clock switches at the same time. the data will arrive first to the register. If you delay the clock enough, the setup time will be negative.