engimk
Newbie level 1
Dear All,
I need your help to design 1-bit comparator using Verilog-A which will be used in CT sigma-Delta modulator.
The comparator should be sample based. I mean that the decision depends on the sampling clk not the input level.
Regards,
I need your help to design 1-bit comparator using Verilog-A which will be used in CT sigma-Delta modulator.
The comparator should be sample based. I mean that the decision depends on the sampling clk not the input level.
Regards,