If i am said that a chip has x % combinational area and y% of sequential area what does it mean?
Also how can i calculate it if the area and number of gates etc..are given ??
Thanks RCA.. just want to elaborate for people who might find it useful.
Seq Area - it comprises of all the flops, latches, memory and other black boxes which can store data and like flops depend on previous value i.e input
Combinational area- all gates and elements made up of transistors which do not depend on previous value.
So, in a DC report if you see sequential area - it comprises all the elements described above and not just flops and latches.