CMOS implementation of 2 input XOR logic Gate

[Urvashi]

How many no. of nmos and pmos transistor are require, for xor logic gate implementation?
a)2 nmos And 2pmos
b)3 nmos And 3pmos
c)6 nmos And 6pmos
d)8 nmos And 8pmos ?
I am confused, please tell right answer....

 

[morris_mano]

XOR for A input and B input = A\[\bar{B}\] + \[\bar{A}\]B

To get \[\bar{A}\], you will need an inverter which is 1 nmos + 1 pmos
To get \[\bar{B}\], you will need an inverter which is 1 nmos + 1 pmos

Cmos basically implements inverted function so XNOR will need 4 nmos + 4 pmos

Now to implement XOR, just add inverter to the output of XNOR which need 1 nmos + 1 pmos

Total = 7 nmos + 7 pmos

But if you assume, you are already given \[\bar{B}\] and \[\bar{A}\] , then

Total = 5 nmos + 5 pmos

 

[FvM]

I don't know, how the 5 + 5 implementation looks like. Standard CD4070 uses this one, unfortunately different from the prescribed multi choice selection. ASIC libraries mostly use 6 + 6.

 

[morris_mano]

Some more cmos implementation of XOR

https://www.edaboard.com/threads/213257/

 

[ravipandu46338@gmail.com]

Hi Urvashi,

As per my Knowledge you need 12 transistors to implement xor gate......,6pmos,6nmos transistors are required.....,

Hope This Can Help You.....,