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CMOS geometry: Length is Resistance, Width is Capacitance?

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ivlsi

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Hi All,

How the CMOS geometry might be represented in terms of Resistance and Capacitance?

Do the Length represents Resistance and Width represents Capacitance?

Thank you!
 

d123

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Hi, out of my depth so don't bite my head off or feel offended if my contribution is way off the mark or far too simple, apologies if it is. I'm interested in answers to your question. I searched a little for "Length/Width ratio and capacitance in MOSFETS", and don't know if any of these may provide some relevant information if you skim-read them to the bits that mention W/L and so on:
 

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srizbf

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The Resistance you are referring is channel resistance.
capacitance is Gate capacitance.(also other Drain to gate , drain to source exists.)

channel resistance is dependent on length , width and thickness of channel.


\[\rho * l /A\]

capacitance (gate) is on length and width and ox layer thickness.

remeber this is a simplified form.
 

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