For CMOS, assume a lightly doped p- type substrate (hence high ohmic, eg. 32 OHM/cm). If you deposit a higher doped epitaxy on the substrate, you can minimize parasitic effects due to lower resistivity. Another effect is that currents won't penetrate deep into the substrate, as they will be "reflected" by the boarder between epi and substrate.
epi can provide you better surface to fabricate your device.... i.e less defect compare to pure substrate.... one of the advantage is that you will have low noise device...