Clock root is not extracted---->Cadence Encounter??????

[jitendravlsi]

encounter extracted view

Dear all,
I am doing CTS of my design.
I have done pre-cts optimization successfully.
after that i did
set cts mode
but now when i do create clock tree spec, then i get the result as follows:
++++++++++createClockTreeSpec++++++++++++++++++
CTE Mode
Options: -output name.ctstch
-bufFootprint clkbuf
-invFootprint clkinv
Total 0 clock roots are extracted
______________________________________________________

as 0 clock root is extracted, so I m not able to do clock tree synthesis.

please suggest me where I am going wrong?

Thanks in advance

 

[shelby]

pre cts mode

be sure your create clock constraints are loaded. What does the name.ctscth file show?

 

[jitendravlsi]

cte mode cadence

Ihave checked : clock constraints are loaded.

but name.ctstch file is blank.

bye the way thanks for reply.

please suggest some other solution.

 

[aravind]

cadence encounter cts

try report_clocks report_constraints command in fe. to make sure clock source point is available

 

[raju3295]

should not be done as root of cadence

you can create ctscsh file by
createClockTreeSpe and load this file before cts, and dont forget to load the clock constraints , which will be i/ps for createclocktreespe command and do give options for setCTSMode options like below
setCTSMode -topPreferredLayer $top_routing_layer
setCTSMode -bottomPreferredLayer [expr $top_routing_layer - 1]
setCTSMode -preferredExtraSpace 1
setCTSMode -leafTopPreferredLayer $top_routing_layer
setCTSMode -leafBottomPreferredLayer [expr $top_routing_layer - 1]
setCTSMode -leafPreferredExtraSpace 0
setCTSMode -optAddBuffer true
setCTSMode -opt true
setCTSMode -routeClkNet true
setCTSMode -moveGate true

Added after 1 minutes:

Or else u can create ur own cts specification file , and u can source it to cts engine