Clock multiplier in CPLD

[ITP]

clock multiplier cpld

Hi all,

I want to impliment a clock multiplier in CPLD using VHDL. My application is to use 10Mhz external clock, multiply by 10 and use 100Mhz for clocking inside CPLD. I am using Xilinx XC9572 CPLD. Kindly suggest any scheme or related links.

Thanks and regards
Itp

 

[Husoo]

cpld clock multiplier

in cpld 95xx there is no resource to multiply frequency, so u should build up an asynchronous freq multiplier or change cpld to another type, use fpga with dll, change external freq, or ...
Anyway, with asynchronous circuit u can only double the main freq afaik.

 

[lucbra]

The only CPLD capable of multiplying is Lattice XPLD. The smallest device however is a 256MC and has 2 PLL's and the blocs can be configured as memory or as CPLD.