clk generator - need to create clk

[rixxy]

clk generator

I need to create clk and clk bar from a single clk generator with frequency 27 MHz..i tried to use NAND latch but i i found an overlapping btw the clk bar and the clk..noting that i'll take the clk bar from the latch o/p and the other o/p will be high always(i think the i/p speed is very fast to the circuit so that it doesnt respond to it).

 

[chinoRuiz]

Couldn't you send an schematic ?
I don't imagine what is your problem.

Maybe you will need to pass the CLK trough an AND gate (pico gate from Fairchild for example) and the CLK~ through an NAND pico gate to have similar delays between the two.
There are gates of about 2 ns of delay (measured, and 5 ns typical).

 

[ptoo30]

without logic diagram some asumption will be added to my suggestion. you need 27MHz cl and xcl. the one method is :
1 multiply 27MHz to 54MHz using doubler(delay logic +nand gate)
2 devide that 54MHz signal by 2 using flipflop
3 you can use the output fr ff q and xq
4 if there remain the phase difference between q and xq(using traditional ff you can see delayed xq) you add 2 inverters to q output

bye

 

[rixxy]

without logic diagram some asumption will be added to my suggestion. you need 27MHz cl and xcl. the one method is :
1 multiply 27MHz to 54MHz using doubler(delay logic +nand gate)
2 devide that 54MHz signal by 2 using flipflop
3 you can use the output fr ff q and xq
4 if there remain the phase difference between q and xq(using traditional ff you can see delayed xq) you add 2 inverters to q output

bye

would you send me a diagram of your suggestion?