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Cellular Ram to operate in page read mode but to no avail

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ombadei

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cellular-ram

Hi.. Hope someone can help me on this.. please..

In VHDL, been trying to configure the cellular ram to operate in page read mode but to no avail.. I am using the digilent nexys board.. It is working well in the asynchronous mode..

I wrote to the configuration register and did a read array for the initial startup.. and tested by writing values to consecutive addresses and tried reading it.. but the last word i read is still the initial value..

MT45W8MW16BGX-708 WT

https://download.micron.com/pdf/datasheets/psram/128mb_burst_cr1_5_p26z.pdf
 

mt45w8mw16bgx vhdl

Could it be the addresses change too fast? I understand cellular RAMs are slow.. Even in page mode, you can barely reach data rate of 30M biword/sec.

By the way, have you found a simulation model of the Intel StrataFlash ROM on the same board?
 

cellular rams

cellular RAMs are slow

Are you saying that the specifications of the cellular ram are not within standards? I abide by the timing diagrams and gave a lot of attention to the critical timing requirements. Should i give more allowance when i output the control signals?

Currently, i wrote a set of values in consecutive locations and i am reading intermittent values.


a simulation model of the Intel StrataFlash ROM

Sorry.. as i do not require the dev board's strataFlash in my proj, i have not explore any functionalities of it.
 

cellularram

ombadei said:
cellular RAMs are slow

Are you saying that the specifications of the cellular ram are not within standards? I abide by the timing diagrams and gave a lot of attention to the critical timing requirements. Should i give more allowance when i output the control signals?

Currently, i wrote a set of values in consecutive locations and i am reading intermittent values.

oh, i can not give comment cos I dont see your timing, you maybe can download the example simulations from Micron's website, the ZIP package contains simulation model and a simple testbench. I ran it in Modelsim sometime ago and it was alright.


ombadei said:
a simulation model of the Intel StrataFlash ROM

Sorry.. as i do not require the dev board's strataFlash in my proj, i have not explore any functionalities of it.

It's fine. Do post a link here when u have the info on that. ROM is very useful if you want to demo your designs offline.
 

micron mt45w8mw16bgx-708 wt pdf

thanks.. that's really helpful..

I am new to modelsim..... Just by looking at all the different wave simulation, how do i zoom in on the page read timing cycle?
 

micron psram vhdl

ombadei said:
thanks.. that's really helpful..

I am new to modelsim..... Just by looking at all the different wave simulation, how do i zoom in on the page read timing cycle?

Hold down the wheel/center button of the mouse and drag.. it will mark an area and zoom in.
 

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