30 dB shouldnt be an issue with that process.
If you do no thave any major constraints on output voltage swing at the moment, I would start by using a wideswing current mirror to bias the M3 and M4. Simply add a second "layer" on the two mirrors.
Set all L to be equal and for now set it as low as possible to start with. (Why do you have 1.8 um as minimum length? or is it a typo?)
Start by settings Widths of Mref, M1 and M2 equal, as well as M5 and M6 equal. M3 and new cascode transistor widhs equal, and M4 with its new cascodes equal as well.
That gives you 4 variables to play around with (W_{ref,1,2}, W_{5,6}, ..., etc.).
Start by making W_{ref,1,2} and W_{5,6} quite big to push down the voltages on those gates. Then align...