Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
There are several things of importance.
To point a few
1. check consistency between logic and physical libraries
2. check that all physical cells are created
3. Before Performing virtual placement make sure you place and fix hard macros if any
4. properly set your max routing layers
5. Constrain macros based on their interactions with the I/O pads
6. Set sliver sizes and paddings/blockages for macros
....
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.