Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
C language is used extensively in Verification primarily in Algorithm implementation and reference models . It is accessed in the verification environment using PLI or FLI.
Assembly language is used when the verification environment has a processor. Assembly tests are created and the output is converted into a format ( Mainly Hex) which is preloaded into the memory. After resets processor starts executing from the memory.
Assembly language can also be used by the PLI/FLI C functions.
in SOC verification it is also used since SOC contains processor, we have to verify traffic from processor to different module so we can write write c programs and binary file of it is loaded into DDR or SRAM from where processor starts booting.
C/C++ is surely one of the most used languages for hardware verification. Either for testbench code or for reference modeling. In both cases integrated to the logic simulator through a DPI/PLI/FLI interface or a SystemC shell.
In processor driven testbenches where verification engineers write test software to run on the DUT on-chip microprocessor, C is widely employed to rise the abstraction of the test programs.