We are getting recovery timing violation in some part of the memory, in the past we tend to ignore them. Since it's not as well known as setup/hold, and i can not find them in previous training manuals.
recovery time is a min. time of stable level of an asynch. signal before
clock edge;
if violated, a flip-flop can't decide if it's still under reset of can perform
'normal' activity ... ;
---
hw much will be the penality on area or in congestion by buffering up the reset nets to meet this criteria,, if it is more in a design then is is profitable to choose asynchronous reset
recovery time is a min. time of stable level of an asynch. signal before
clock edge;
if violated, a flip-flop can't decide if it's still under reset of can perform
'normal' activity ... ;
---
the classical example of a malfunction due to 'hold time violation'
is an undefined state of FSM - the FSM can enter any - including illegal -
state after reset;
so it doesn't matter how many clock cycle pass before the activity starts,
it will start from a wrong state;
---
hi j_andr,
if the reset is asserted for more than a clock cycle then would it not allow safe propagation of reset to the system ultimately, although it might have propagated a meta stable reset value initially when the removal/recovery times are violated ?