whlinfei
Member level 2
calibre LVS errors
Hi All,
LVS gave the following error messages.
Clearly it can identify the resistors both in schematic and in layout.
But somehow it refuses to match these two to be the same.
Can anyone help me on that?
thanks.
Whlinfei
INCORRECT INSTANCES
DISC# LAYOUT NAME SOURCE NAME
**************************************************************************************************************
1 R0(7.930,-15.110) R(OPRRPRES) ** missing instance **
--------------------------------------------------------------------------------------------------------------
2 ** missing instance ** ROPrrp0 R(OPRRPRES)
**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************
Matched Matched Unmatched Unmatched Component
Layout Source Layout Source Type
------- ------- --------- --------- ---------
Ports: 3 3 0 0
Nets: 3 3 0 0
Instances: 0 0 0 1 R(OPRRPRES)
0 0 1 0 R(OPRRPRES)
------- ------- --------- ---------
Total Inst: 0 0 1 1
Hi All,
LVS gave the following error messages.
Clearly it can identify the resistors both in schematic and in layout.
But somehow it refuses to match these two to be the same.
Can anyone help me on that?
thanks.
Whlinfei
INCORRECT INSTANCES
DISC# LAYOUT NAME SOURCE NAME
**************************************************************************************************************
1 R0(7.930,-15.110) R(OPRRPRES) ** missing instance **
--------------------------------------------------------------------------------------------------------------
2 ** missing instance ** ROPrrp0 R(OPRRPRES)
**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************
Matched Matched Unmatched Unmatched Component
Layout Source Layout Source Type
------- ------- --------- --------- ---------
Ports: 3 3 0 0
Nets: 3 3 0 0
Instances: 0 0 0 1 R(OPRRPRES)
0 0 1 0 R(OPRRPRES)
------- ------- --------- ---------
Total Inst: 0 0 1 1