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Cable delay

engr_joni_ee

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Hi, I am wondering how much delay is expected on 5 meter long cable having fire fly connectors. The cable is manufactured by Samtec. I would like to know about the delay through the cable when 1.2 Gbps differential signals are running through the cable.
 
Hi,

most cables come with datasheets. And many of the datasheets also specify signal speed.

It depends on the cable type, not on the connectors or the frequency...

Just to give you a number: Signal speed of an RG58 cable is about 2/3 of speed of light.

Klaus
 
Cable delay a direct f( dielectric constant ) :

https://picwire.com/Resources/Technical/Technical-Articles/Velocity

1698771859088.png


Regards, Dana.
 
More important than just 25 ns delay in 5 m cable is the skew and frequency response of differential signals. This is demonstrated by Samtec by eye height in picoseconds for various bit rates after frequency compensation to de-emphasize the low frequency.

A rough rule of thumb is the product of bit rate and distance with certain assumptions specified for equalization and BER.

here 14 Gbps * 23["] / 39.6 ["/m] = 8.1 Gbps-m or 1.6Gbps in 5 m
This was simulated with low skew and dispersion in 50 ohm lines.

1698774158280.png

1698774732779.png
 
I manage to run some simulaiton in HyperLynx SI tool in which I have two routed layouts and they are connected through a 5 meter cable in between. I have LVDS driver on one board and have receiver on the other board. The delay in simulation is around 28 ns. This also includes delay on the transmission line on each board where I have trace length is around 8 inches to 14 inches.

The peak to peak value of differential signal at the receiver remain only at 70 mV.
It was 700 mV when probing at the driver and cable connetcor on the driver baord. Then it reduces to 200 mV peak to peak at the cable connector on he reciver baord. And finally 70 mV peak to peak when probing at the receiver. The total delay is around 28 ns.

Can we improve peak to peak at the receiver FPGA ? Any sugestion ?
 
Hi,

We still have no clue what cable you are using.
We don't know which driver you are using.
We don't know what termination technique and what values you are using.
We need a crystal ball.

How can we help this way?
As always: a sketch with all the informations would be helpful.

Klaus
 
I manage to run some simulation in HyperLynx SI tool in which I have two routed layouts and they are connected through a 5 meter cable in between. I have LVDS driver on one board and have receiver on the other board. The delay in simulation is around 28 ns. This also includes delay on the transmission line on each board where I have trace length is around 8 inches to 14 inches.

The peak to peak value of differential signal at the receiver remain only at 70 mV.
It was 700 mV when probing at the driver and cable connector on the driver board. Then it reduces to 200 mV peak to peak at the cable connector on the receiver board. And finally 70 mV peak to peak when probing at the receiver. The total delay is around 28 ns.

Can we improve peak to peak at the receiver FPGA ? Any suggestion ?
How does Eye Height compare to my 8.1 Gbps-m estimate?
Your lack of details prevents more detailed analysis of your attenuation and dispersion losses.

side note: Rapid typing on down-key and slow release on up-key causes N-key rollover to fail and create reversed letters and spelling errors with 2 letters reversed. Consider, this common fault on all keyboards for fast typists. The sequence after 2 keys pressed depends on the release sequence, not the press sequence. Also consider spell-checks enable and Grammarly addon to check.
 
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