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Bursty traffic SystemVerilog

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BartlebyScrivener

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I would like to simulate a valid flag, on a clock edge, a certain percentage of the time. A simple way I have been doing this is to

valid <= ($urandom_range(100,1) <= RATE) ? 1 : 0;

So, if RATE was 50, valid will be high approximately 50% of the time. However, this is a pretty even traffic pattern. I would like to simulate traffic that comes in bursts, i.e more irregular, but still tend to an overall RATE over time.

Any ideas how to do this?

Many thanks.
 

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