vhdl code rising_edge and falling_edge
Yes you can, and using rising or falling edge using constraints highly depend on your design. I want to add two things
1- If you have uncertain in any issue simply try it and see what the synthesizer will result, also this experiment will help you to deeply understand what the members explain.
2- bibo1978 say that
"you can't simply pass data from a rising edge register to a falling edge register"
you can do so as long as the setup and hold time is meet.