Best commercial and free simulators for Verilog HDL

[David83]

Hello all,

What are the best commercial and free simulators for Verilog HDL?

Thanks in advance

 

[ads-ee]

Hello all,

What are the best commercial and free simulators for Verilog HDL?

Thanks in advance

Modelsim - ubiquitous and supports both Linux and Windows PCs
VCS - very fast, nix only
Incisive - also very fast, nix only

Only free one I know of worth using is Icarus even then it doesn't support the latest standard nor does it support all of 2001.

You could have also looked at this before hand and perhaps gotten the answers you were looking for.

- - - Updated - - -

Let me amend that, looks like Icarus has improved support for 2001, but sill lacks anywhere near comprehensive support of 2005.

 

[David83]

Thanks. That was helpful. I searched the Internet, and as usual beginners get lost.

A question: is there a big difference between Verliog and SystemVerilog? I started with Verilog, is it better to start with SystemVerilog?

 

[ads-ee]

SV is the current standard and is a superset of Verilog. SV has features specifically taylored to support verification.

 

[David83]

SV is the current standard and is a superset of Verilog. SV has features specifically taylored to support verification.

OK, so since SystemVerilog is a superset of Verilog, I guess I can start using Verilog for now to familiarize myself with the basics, and then I'll switch to SystemVerilog later.

 

[dpaul]

I guess I can start using Verilog for now to familiarize myself with the basics

For this requirement the following should suffice:

ModelSim PE Student Edition (Target the student editions for free stuff).
I don't know its performance as compared to Icarus.

 

[David83]

For this requirement the following should suffice:

ModelSim PE Student Edition (Target the student editions for free stuff).
I don't know its performance as compared to Icarus.

That's right. I downloaded it. It seems good. I also downloaded Icarus. I didn't read through the documentation, but I couldn't find the editor interface (when I double clicked the icon on my desktop, the folder of the program opened up, but there was no GUI). I guess it's used through the command line?!!

Question: what is hardware verification? We use the stimulus module to test the design module. Is verification something else?

 

[dpaul]

We use the stimulus module to test the design module. Is verification something else?

That is called functional verification. You provide various stimulus to your DUT via a test-bench and then observe the output signals how they behave, whether they are performing the intended functions or not.

A test-bench might not cover all the corner-cases of a design. This is where SystemVerilog and hardware verification comes in. They will simulate the DUT with all possible input vectors and observe the results. Lots of bugs can crop up in a designed DUT if it has not been carefully coded.

 

[David83]

That is called functional verification. You provide various stimulus to your DUT via a test-bench and then observe the output signals how they behave, whether they are performing the intended functions or not.

A test-bench might not cover all the corner-cases of a design. This is where SystemVerilog and hardware verification comes in. They will simulate the DUT with all possible input vectors and observe the results. Lots of bugs can crop up in a designed DUT if it has not been carefully coded.

And all the possible inputs are provided automatically or by someone?


So a designer would do verification or will leave it to someone else? Because I find job titles as ASIC designer engineer, and ASIC verification engineer, as if the two are separate.

 

[ThisIsNotSam]

And all the possible inputs are provided automatically or by someone?


So a designer would do verification or will leave it to someone else? Because I find job titles as ASIC designer engineer, and ASIC verification engineer, as if the two are separate.

both are separate and for good reasons. you don't want to verify the code you wrote, that would be biased. the exception might be if you work for a tiny company where everyone does everything.

 

[David83]

both are separate and for good reasons. you don't want to verify the code you wrote, that would be biased. the exception might be if you work for a tiny company where everyone does everything.

So, basically, as ASIC design engineer can work as an ASIC verification engineer, and vice versa, right?

 

[ThisIsNotSam]

So, basically, as ASIC design engineer can work as an ASIC verification engineer, and vice versa, right?

very few people would have the skills to be good at both. in general, no, no designer would do the work of a verification guy.