Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

below 5 volts on logic boards causes longer propagation delay

Status
Not open for further replies.

raydavis1

Banned
Joined
May 13, 2015
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
0
why does TTL logic IC chips get damaged when lowering below +5 volts and the propagation delay gets longer?
 

KlausST

Super Moderator
Staff member
Joined
Apr 17, 2014
Messages
19,715
Helped
4,341
Reputation
8,691
Reaction score
4,303
Trophy points
1,393
Activity points
130,510
Hi,

Damaged?

What voltage? VCC or signal?

Klaus
 

FvM

Super Moderator
Staff member
Joined
Jan 22, 2008
Messages
48,395
Helped
14,248
Reputation
28,757
Reaction score
12,936
Trophy points
1,393
Location
Bochum, Germany
Activity points
280,072
ICs can be expected to get damaged if exceeding the absolute maximum ratings. To achieve the specified peformance, you are required to keep the recommended operation conditions, e.g. Vcc = 5V +/- 5% for classical TTL and LSTTL devices.

TTL logic isn't designed to operate over a wider voltage range, HCMOS (74HC familiy) in contrast is. It has voltage dependent speed according to variation of MOSFET Rdson over gate voltage.

It's unlikely to damage logic ICs by a too low supply voltage.
 

raydavis1

Banned
Joined
May 13, 2015
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
0
Yes when I lower the +VCC below 5 volts around 4 volts dc, it will cause the TTL logic chips to get really hot and the propagation delay gets slower or longer. Any reasons why this happens?

TTL has transistors, when lowering the voltage on transistors it doesn't damage them or get them hot. So why does TTL chips get hot and get damaged.
 

andre_teprom

Super Moderator
Staff member
Joined
Nov 7, 2006
Messages
9,252
Helped
1,151
Reputation
2,321
Reaction score
1,133
Trophy points
1,403
Location
Brazil
Activity points
53,869
The gain of transistors may vary in function of the biasing current. The electric characteristic of inner components certainly are optimized to meets the optimal performance at the recommended operation conditions far from linear region.
 

FvM

Super Moderator
Staff member
Joined
Jan 22, 2008
Messages
48,395
Helped
14,248
Reputation
28,757
Reaction score
12,936
Trophy points
1,393
Location
Bochum, Germany
Activity points
280,072
I doubt that TTL logic gets hot or will be even damaged at 4 V as a general case. That's probably a specific problem of your test setup. Can you describe the circuit in detail?

Slower operation is however expectable. Transistor current are reduced and capcitances maintained. Results typically in slower switching. You are operating the devices outside the specified voltage range and can't be sure to get meaningful output signals at all.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top