Basic question about Cadence LVS

[nuddin]

cadence lvs fail

Hi all,

I am desiging a differential amplifier in Cadence. I did the extraction from layout and it was successful without any error.I made the circuit in schematic and am trying to check with LVS ( I'm using divaLVS.rul).

The problem I am facing is that whenever I start LVS run... it gives me a message "Job '.......'" that was started... (time) has failed.

And the error display it shows " '..........layout/netlist' is not valid. You must initialize the LVS run with a valid LVS run directory before you can probe"!!

I kept the run directory field as my design directory... I don't understand what should I change.

Can anyone pls help me regarding this.

 

[AnnaA]

When I had problem with LVS I had to write the whole path to the Diva rules. Sometimes it works without the whole path and sometimes it does not.

Good luck!
Anna

 

[nuddin]

Hi Anna,
It says invalid netlis inside LVS... I did try according to your instruction... it didn't work!!

Can you pls tell me about the run directory "LVS"... how can I put a valid directory name/path?

Thanx

Nuddin