Aug 25, 2008 #1 A ASIC_intl Banned Joined Jan 18, 2008 Messages 260 Helped 2 Reputation 4 Reaction score 2 Trophy points 1,298 Activity points 0 Can u provide basics and detail of Look up tables used in FPGA? Can u have any document on this?
Aug 26, 2008 #2 pmat Member level 5 Joined Mar 26, 2007 Messages 91 Helped 15 Reputation 28 Reaction score 9 Trophy points 1,288 Location Grenoble, France, EU Activity points 1,790 Re: LUT Take a look at this spec: **broken link removed** Pavlos
Aug 27, 2008 #3 S sanjay11 Member level 1 Joined Dec 7, 2006 Messages 32 Helped 1 Reputation 2 Reaction score 1 Trophy points 1,288 Activity points 1,428 Re: LUT https://en.wikipedia.org/wiki/Field-programmable_gate_array https://www.xilinx.com/support/documentation/white_papers/wp209.pdf **broken link removed**
Re: LUT https://en.wikipedia.org/wiki/Field-programmable_gate_array https://www.xilinx.com/support/documentation/white_papers/wp209.pdf **broken link removed**