[b]CONTROL DDR OR SDRAM USE FPGA [/b]

[TERRYWU3]

DEAR ALL:
I want to control dram use FPGA to transmit/receive the digital video data from video codec chip .And must have READ /WRITE IT. Who can give me a hand . Or give me some resolution
/ document or EXAMPLES IN VHDL FILE....

REALLY THANKS ^_^


My EMAIL : terrywu3@yahoo.com

 

[juripero]

Both @ltera and Xilinx have excellent application notes and free VHDL codes for DDR memory controller. Just do a search at their sites.

 

[cube007]

Hello,

take a look at https://www.opencores.org/projects/ for free controller cores.

by,
cube007