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[b]CONTROL DDR OR SDRAM USE FPGA [/b]

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TERRYWU3

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DEAR ALL:
I want to control dram use FPGA to transmit/receive the digital video data from video codec chip .And must have READ /WRITE IT. Who can give me a hand . Or give me some resolution
/ document or EXAMPLES IN VHDL FILE....

REALLY THANKS ^_^


My EMAIL : terrywu3@yahoo.com
 

juripero

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Both @ltera and Xilinx have excellent application notes and free VHDL codes for DDR memory controller. Just do a search at their sites.
 

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