automatic gain control (AGC)

[CRiSP]

who have this verilog code/design about AGC?

 

[brmadhukar]

Hi,
Is this for control of RF or for audio. Do you have any idea on how it is done.
BRMadhukar

 

[CRiSP]

Hi,
Is this for control of RF or for audio. Do you have any idea on how it is done.
BRMadhukar

For RF.

 

[brmadhukar]

Hi,
I am not sure whether this can help you. For one of the RFs we do use FPGA to control AGC. The logic is very simple.
Count the Magnitude bit between fixed intervals.
If it exceeds 30% of samples decrease AGC gain
otherwise increase.
This is done continuously.
30% is based on Amoroso paper.
Hope this helps you. I am sorry I cannot share the code.
BRMadhukar

 

[CRiSP]

Hi,
I am not sure whether this can help you. For one of the RFs we do use FPGA to control AGC. The logic is very simple.
Count the Magnitude bit between fixed intervals.
If it exceeds 30% of samples decrease AGC gain
otherwise increase.
This is done continuously.
30% is based on Amoroso paper.
Hope this helps you. I am sorry I cannot share the code.
BRMadhukar

ur code is a full digital AGC or only control external AGC(analog part) circuit ?

 

[boeysue]

Can you tell me where does the Aromos pubilished the paper?
Did it in IEEE journal?Thanks a lot.

 

[spauls]

U can write a simple C/ Verilog code for AGC,
but that code would be non synthesisable,

 

[boeysue]

>>Count the Magnitude bit between fixed intervals.
What does it mean the Magnitude bit? Does it mean the MSB?