ali8
Member level 2
Hello,
I have an ATLYS FPGA kit, and use ISE 13.1, and I have this code:
I want "A" to be SW0 ( A10 ), and "Z" to be LED0 ( U18 ), so
when the switch is on, the LED is on, and vice versa.
I cannot figure out how to do it, any help is appreciated.
-Ali
I have an ATLYS FPGA kit, and use ISE 13.1, and I have this code:
Code:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity Simple is
Port ( A : in STD_LOGIC; Z : out STD_LOGIC);
end Simple;
architecture arch_simple of Simple is
begin
process(A)
begin
if (A=1) then
Z <= '1';
else
Z <= '0';
end if;
end process;
end arch_simple;I want "A" to be SW0 ( A10 ), and "Z" to be LED0 ( U18 ), so
when the switch is on, the LED is on, and vice versa.
I cannot figure out how to do it, any help is appreciated.
-Ali