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Assura LVS extraction rules debug

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jmoore180

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Hi.
I have a design rule mod I have been using for years to calculate a certain transistor geometry and after moving to a new design kit and version of Assura I am getting:

ERROR Text can't attach to layer: substrate is not connected.
WARNING LVS Run detected.
Non-legacy mode has been disabled for this LVS run
WARNING Errors exist in rules file so this program cannot continue.
Errors exist in the rules file '/opt/cad/IBM_PDK/cmrf8sf/V1.7.0.2DM/Assura/LVS/extract32.rul'.

Is their a way to get Assura to tell you where in the rules file it is running in to problems? I already have the verbose and strict switches set.
 

Please refer to this link:
 

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