lhlbluesky
Banned
opa differential folded cascode
i have designed a folded cascode fully differential opamp used for pipelined adc(1.5 bit per stage),but there are some problems:
when i test it in open loop with ideal cmfb(vcvs source),the GBW is 103M,dc gain is 80 db,-3db bandwidth is about 10khz;however,when i test it in closed loop with sc-cmfb,there are some strange problems:
first,my design object is 15Ms/s,but the actual speed is only 2Ms/s or so,whatever i do,it remains so;i don't know why?
second,in the sample phase,i want to reset vout+ and vout- to vcm(0.9V) through a CMOS switch in phase phi1,however,the value is always below 0.9V; in the first clock cycle,it's about 500mV,and it increases gradually until the six clock cycle,it reaches 890mV or so,after that,it remains unchanged;i don't know why ,too;moreover,when i connect Cs and Cf to vcm through CMOS switch in phase phi1,the value is exactly 0.9V,so,i think the CMOS switch is ok;but what's wrong?
third,i connect vin- to 0.9V,vin+ from 0.3V to 1.5V,then vref=0.6V,vref+=1.2V.vref-=0.6V,is that right?
and i what to know what's the desired value of vout+ and vout-?for example,when vin+=1.4V,what's the desired value of vout+ and vout-?
please help me , i'm really confused ,thanks all.
i have designed a folded cascode fully differential opamp used for pipelined adc(1.5 bit per stage),but there are some problems:
when i test it in open loop with ideal cmfb(vcvs source),the GBW is 103M,dc gain is 80 db,-3db bandwidth is about 10khz;however,when i test it in closed loop with sc-cmfb,there are some strange problems:
first,my design object is 15Ms/s,but the actual speed is only 2Ms/s or so,whatever i do,it remains so;i don't know why?
second,in the sample phase,i want to reset vout+ and vout- to vcm(0.9V) through a CMOS switch in phase phi1,however,the value is always below 0.9V; in the first clock cycle,it's about 500mV,and it increases gradually until the six clock cycle,it reaches 890mV or so,after that,it remains unchanged;i don't know why ,too;moreover,when i connect Cs and Cf to vcm through CMOS switch in phase phi1,the value is exactly 0.9V,so,i think the CMOS switch is ok;but what's wrong?
third,i connect vin- to 0.9V,vin+ from 0.3V to 1.5V,then vref=0.6V,vref+=1.2V.vref-=0.6V,is that right?
and i what to know what's the desired value of vout+ and vout-?for example,when vin+=1.4V,what's the desired value of vout+ and vout-?
please help me , i'm really confused ,thanks all.