design and verification are quite orthogonal, and one would usually focus on only one.
for design, I would first learn verilog and synthesis. You can go about using tutorials, books might not be the best source.
for verification, I think Bergeron is a good author.
design and verification are quite orthogonal, and one would usually focus on only one.
for design, I would first learn verilog and synthesis. You can go about using tutorials, books might not be the best source.
for verification, I think Bergeron is a good author.
OK, what's the difference between design and verification, and which one is more demanded in the industry? Also, do you have any recommended tutorials on the design? Thanks