ASIC library netlist to FPGA

[imbichie]

Hi All,

Is it possible to porting the ASIC netlist librarie into FPGA.?

Here i am using Xilinx FPGA for prototyping, so is it possible to port all the ASIC library in to corresponding FPGA library.?

 

[tariq786]

I don't think this can be done automatically. You can do that manually.

Do you have any example?

 

[kingslayer]

Do you think it is really possible to port ASIC to FPGA? For instance, how can you map AND gates from standard-cell library to LUTs in FPGAs?

Cheers