asic and fpga flow.. ?

Similar threads

• K

  Implementaing an ASIC design on an FPGA

  • Started by keyboardcowboy
  • May 3, 2023
  • Replies: 6

  ASIC Design Methodologies and Tools (Digital)
• H

  Commands / Flow to make a gate array from custom standard cells?

  • Started by Hillts
  • Mar 15, 2024
  • Replies: 1

  ASIC Design Methodologies and Tools (Digital)
• A

  [SOLVED] Synthesis and Power Analysis flow for SRAM

  • Started by abhishektyagi
  • Jun 8, 2023
  • Replies: 3

  ASIC Design Methodologies and Tools (Digital)
• R

  What is TCD cell in ASIC Physical Design?

  • Started by Rashiba
  • Oct 15, 2023
  • Replies: 5

  ASIC Design Methodologies and Tools (Digital)
• R

  How to making ASIC chip?

  • Started by ricky89
  • Mar 28, 2023
  • Replies: 1

  ASIC Design Methodologies and Tools (Digital)