If there will be a case when the antenna violation is coming on millions of wires in layout, then what we will do ?
As, Initally we prefer for higher metal jumper but the case is also that we don't have any left higher metal jumper and also using a reverse bias diode for millions of wires cannot be a better idea .
Antenna checks should be done at the top level of a design once the layout is LVS clean. If you are then getting millions of errors the I suspect there is something wrong with the rule deck. BTW, it is my experience that antenna issues decrease as technology nodes shrink.
Maybe there is some "knob" in the P&R tool which can
set a maximum run-length in one layer without "popping
up" to a higher layer (lower layers can't help antenna
but a jumper above, does).
Antenna sensitivity ought to reduce as you get to
nodes where gate tunneling current is an everyday
thing. Gate current is what's trying to be prevented.