Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Analog and Mixed signal design flows

Status
Not open for further replies.

ranger01

Advanced Member level 4
Joined
Jan 20, 2012
Messages
100
Helped
14
Reputation
28
Reaction score
15
Trophy points
1,298
Location
Santa Clara, CA
Activity points
1,908
How does a complete design cycle of Analog and Mixed signal chip look like?
 

erikl

Super Moderator
Staff member
Joined
Sep 9, 2008
Messages
8,112
Helped
2,689
Reputation
5,358
Reaction score
2,291
Trophy points
1,393
Location
Germany
Activity points
44,164
1. Error-free DRC run and GDSII tape-out of your own data base, totally based on the fab's/foundry's PDK
2. Your own test pattern generated considering the fab's/foundry's specification re. format and error coverage.

For more info see the fab's/foundry's detailed docu, which always is confidential.
 

ranger01

Advanced Member level 4
Joined
Jan 20, 2012
Messages
100
Helped
14
Reputation
28
Reaction score
15
Trophy points
1,298
Location
Santa Clara, CA
Activity points
1,908
Thanks for the response! Pardon my ignorance If I haven't caught the complete design flow of Analog and Mixed signal IC design. Could you please elaborate a little, like how is the design done? I am sure you don't use any coding, but are you going for Cell placement directly?, What kind of cells will be used? what is the abstraction level? How do you verify the functionality of the design? How do you generate the stimulus/patterns for functional verification? How do you plan for testing manufacturing defects? In format do you communicate your design to the foundry? Thanks in advance!
 

erikl

Super Moderator
Staff member
Joined
Sep 9, 2008
Messages
8,112
Helped
2,689
Reputation
5,358
Reaction score
2,291
Trophy points
1,393
Location
Germany
Activity points
44,164
I think this is too much to be explained in the scope of a forum post, sorry. To learn about this, I'd suggest to read a textbook about Analog and Mixed Signal Design Methodologies; several of those are available. Abstraction level input can be quite different, depending on available tools and the foundry's PDK support, similar is valid for the verification methods and tools. Foundry communication format in most cases is GDSII, as mentioned above.
Good luck!
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top