Amplifier design (single or multi-stage) - help in the design equations

[Ayman Essam]

how do i design an amplifier with the following specs ? how do i choose the topology and based on what ? what rules do i need ?

specs:
Av ≥20dB
Rin ≥100KΩ
BW ≥50MHz
Output Swing ≥ 0.4Vpp
DC Current ≤ 1mA
RL=500Ω, CL=5pF

 

[BradtheRad]

This can be done with a single transistor. Look up a chart comparing the three configurations for making a transistor amplifier. (Gain, input impedance, output impedance, etc.) You probably will not choose common base.

Therefore do a comparison of the other two types. That is, design an amplifier for common collector mode, and one for common emitter mode. One of them is bound to emerge as the best candidate.

 

[LvW]

I have some doubts if a single transistor stage can do the job - in particular with respect to the required input Rin.

 

[AMS012]

You can try cascode common source amplifier topology which should meet the needs. Since the RL is low, you might have to go for a two stage amplifier. In that case, the second stage could be the cascode common source stage while the first stage could be any topology giving a decent gain (12-14dB) at a very high speed (about 100MHz).

 

[chuckey]

I too have doubts, you will need one transistor for the input impedance, one for the gain and one to drive the 500 load. Also given the Vcc consumption is < 1 mA, you need .2V/500 = .4mA peak OUTPUT current. which would give a quiescent current of at least .2mA, with the peak current coming from the Vcc decoupling capacitor.
Frank

 

[Ayman Essam]

Thanks all for the reply. i am using Cadence 6.14, with TSMC 0.13, with MOS transistors only allowed
the thing is that i can not (or even dont !) know the approach to get the sizing of the transistors given that specs. any help analyzing the specs to extract the sizing ?
Thanks