Wiljan
Junior Member level 3
In the Altera Stratix 10 they do have Hyper-Registers in the routing layer / cross-point, it seems to be a very clever way to "pipeline" much more and thereby squeeze the fmax up like x2. I could for sure use that :lol:
Are this "Hyper-Registers" technology available in any other FPGA series / Vendor?
Thx
Are this "Hyper-Registers" technology available in any other FPGA series / Vendor?
Thx