Not sure waht you mean with "adc program". Building an ADC requires specific analog hardware external to the FPGA. Or are you dealing with a MAX10 device which exposes a built-in FPGA?
Regarding schematic entry, Quartus doesn't offer an option to convert HDL to schematics, except for the RTL netlist viewer which gives a kind of schematic representation of your logic circuit. But schematic entry has to be drawn manually.
Most users of programmable logic proceed from schematic to HDL entry after a few projects, you'll need HDL anyway to describe blocks of complex logic that can't be well described by schematics.