Hi,
DNL and INL ar nonlinearities and usually refer to "LSB" as unit.
So they don´t refer to an absolute voltage error .. with unit "V".
(This may be different with your requirement - please tell us.)
Then DNL as well as INL usually are independet of the gain and it´s error.
Your graph shows
* perfect offset - which is not expectable
* perfect INL and DNL - which is not expectable
* pure gain error
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Now you ask about the value of LSB without giving any usful inoformation.
The ADC designer (or the datasheet) should know
* the nominal analog ADC output voltage range (example: 0...VRef, or 0...5.0V, or -2.5V ... +2.5V)
* the adc resolution in bits (example: 10 bits, 16 bits)
Then the nominal ADC LSB value is: V_LSB = ADC_range / 2^ADC_bits
Example: on a 10 bit ADC with a 0...5.0V output voltage range: V_LSB = 5V / 2^10 = 5V / 1024 = 4.883mV
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Real ADCs have
* offset errors
* gain errors
* DNL and INL errors
* may have "rail" problems. In this case you should exclude measurements at output voltages close to the rail.
Example:
* 10 bit ADC, Range 0V...5V, perfect gain
* -20mV offset error
* +50mV saturation voltage to GND
View attachment 172427
Klaus