Actel ProAsic FPGA programming

[hithesh123]

In Flash based FPGA like Actel proasic3, how do you reprogram them once they are in the field?
With Xilinx or Altera, you just load the code to SRAM and the FPGA will read whatever is in the SRAM.
Anything similar with Actel?

 

[FvM]

You'll reprogram the flash through a JTAG programmer. PA3 family is specified to allow 500 programming cycles.

 

[hithesh123]

Jtag is ruled out.
Can't I load the program from an SRAM?

 

[mrflibble]

Why would you want to add extra parts, when you already paid for the flasm /inside/ the fpga to hold your configuration. All you need is the jtag connection to program the flash in the fpga.

So, power up unit, flash fpga using jtag. remove jtag cable, power down. Now power up, and your design loads staight away from the flash. I mean, that's the whole point of having a flash based thingy.

 

[FvM]

Jtag is ruled out.

Why?

Can't I load the program from an SRAM?

No, read the datasheet.

 

[hithesh123]

Why would you want to add extra parts, when you already paid for the flasm /inside/ the fpga to hold your configuration. All you need is the jtag connection to program the flash in the fpga.

So, power up unit, flash fpga using jtag. remove jtag cable, power down. Now power up, and your design loads staight away from the flash. I mean, that's the whole point of having a flash based thingy.

You can't use jtag when you have your product already deployed in the field. It might be a set top box, needing some minor upgrade.
I can't use jtag, can I?

 

[mrflibble]

Don't see why not. In the example of the set top box that needs to be able to be upgraded, I would rather assume the designer of the set top box would provide a means for this upgrade.

In a set top box there's no double a microcontroller in there somewhere. Use a few pins for jtag to the PA3 and you can have it field programmed by the end user with some nifty interface the set top box designer obviously has to design.

And as FvM suggested, it's all in the datasheet...

 

[FvM]

I'm not sure about Actel, but many FPGA vendors published example code of embedded JTAG programmers. I'm e.g. using Lattice ispVME in a product to reconfigure a CPLD.