the total no. of bits are 112.. so i have to take out the required 8 digit bits from the given 112 bits and store that 8 bits fetched in array..
in which ever way u could do that is acceptable to me..
---------- Post added at 16:59 ---------- Previous post was at 16:58 ----------
can u provide me with complete program with all the syntax's..
entity mywork1 is
Port ( sentence : in STD_LOGIC_vector(111 downto 0));
end mywork1;
architecture Behavioral of mywork1 is
type slv_array_t is array(0 to n-1) of std_logic_vector(7 downto 0);
signal storage : slv_array_t;
signal my_bits : std_logic_vector(7 downto 0 );
begin
process(sentence)
begin
my_bits <= sentence(56 downto 49);
storage(2) <= my_bits;
end process;
end Behavioral;
following error is coming..
ERROR:HDLParsers:1209 - "C:/Documents and Settings/A.Jain/Desktop/newproject/mywork1.vhd" Line 37. slv_array_t: Undefined symbol (last report in this block)
ERROR:HDLParsers:3312 - "C:/Documents and Settings/A.Jain/Desktop/newproject/mywork1.vhd" Line 44. Undefined symbol 'storage'.
ERROR:HDLParsers:1209 - "C:/Documents and Settings/A.Jain/Desktop/newproject/mywork1.vhd" Line 44. storage: Undefined symbol (last report in this block)
types have to be declared in the archture definition (where you declare other signals) if you only want it visible in that file, otherwise for multiple files you have to declare it in a package